Routing the copper traces on a circuit board is slow, fiddly work that hardware engineers still do largely by hand or with rule-based autorouters they then clean up. PCBRouteAgent, a preprint from researchers at the University of Texas at Dallas, Iowa State University and an engineer at Texas Instruments, shows how far a language model can take that job when it is given the right division of labour. The answer is a long way on small boards and not yet far enough on large ones.
The design keeps the model away from drawing traces. A planner, seeded by simple heuristics, decides the order of connections and the corridors they should follow, and the language model only steps in when routes fail, reading board images and failure reports and returning a small patch to the plan. An executor then lays every trace with KiCad's own push-and-shove router and tries several local fixes before reporting back. A board passes cleanly only if every connection is made and KiCad's design-rule check finds no errors.
With Claude Opus 5.5 as the planner, the system cleanly routed all 128 synthetic boards, 94.9% of 99 small real boards, all 10 medium boards and 4 of the 10 large boards. On the real-world sets it beat the best alternative, often the open-source Freerouting, by 13.9, 36 and 10 points. Running it with Claude Haiku 5.5 is the more striking cost result: compared with an earlier agent on the same model, it used about 131 times fewer model calls and cut the API bill across all 247 boards from $20.72 to $4.77. Without the language model at all, clean passes on medium and large boards fell to zero, so the model is doing real work.
For anyone already pointing an agent at KiCad through the KiCAD MCP Server or KiCad MCP Pro, which we review, the lesson is architectural. Both servers expose routing and design-rule checks as tools; this paper suggests letting the model plan and diagnose while KiCad's native engine does the geometry, rather than asking the model to place each segment. The code and a project page are public.
The limits are spelled out by the authors. Six of the ten large boards remain unfinished, and early routing choices can block later ones. Differential pairs such as USB data lines are routed as unrelated wires, which a real design would reject. Traces run about 8% to 11% longer than Freerouting's on the medium and large sets. The medium-board score allowed retries and angle repair, the large-board baselines were run by the authors themselves, and the comparison agent was not tested with Opus because of cost. This is a preprint, not yet peer reviewed, and ten large boards is a thin sample.